Study on copper protrusion of through-silicon via in a 3-D integrated circuit | |
Song M; Wei ZQ(魏志全); Wang BY; Chen L; Chen L; Szpunar JA | |
发表期刊 | MATERIALS SCIENCE AND ENGINEERING A-STRUCTURAL MATERIALS PROPERTIES MICROSTRUCTURE AND PROCESSING |
2019-05-07 | |
卷号 | 755页码:66-74 |
ISSN | 0921-5093 |
摘要 | The through-silicon via (TSV) approach is crucial for three-dimensional integrated circuit (3-D IC) packaging technology. However, there are still several challenges in the TSV fabrication process. One of the widely known challenges is via protrusion phenomenon. Annealing a TSV wafer makes the copper (Cu) TSVs under high stress and may form a protrusion where the Cu is extruded out of the TSV structure. The phenomenon occurs because of the large mismatch in the coefficient of thermal expansion between Cu via and silicon (Si) layer. Cu protrusion is able to cause crack, delamination of the back-end-of-line and short circuit of the chip, thus, it is a dangerous threat to the metal layer interconnect. Experiments are conducted to characterize the protrusion using several techniques. Scanning electron microscope is used to observe the protrusion topography and measure the height. Electron backscatter diffraction (EBSD) technique is implemented to study the grain size distribution, local texture and microstructure evolution inside Cu vias. For the experiment, arrays of 10 mu m diameter TSVs are fabricated and annealed in argon gas environment in six different temperatures. In this paper, finite element analysis (FEA) is carried out to study the Cu protrusion under different annealing conditions. Correlation between numerical results and experimental data is then performed. Based on the verified FEA methodology, several parametric studies are then conducted, including the effects of annealing temperature on Cu protrusion, residual stress distributions of TSV structures. The simulation results are helpful to understand and solve the key problem in TSV fabrication process and reliability challenge. |
关键词 | Through-silicon via Cu protrusion Annealing temperature Electron backscatter diffraction Finite element analysis |
DOI | 10.1016/j.msea.2019.03.130 |
收录类别 | SCI ; EI |
语种 | 英语 |
WOS记录号 | WOS:000467669000008 |
关键词[WOS] | BONDED COMPLIANT SEAL ; RESIDUAL-STRESSES ; DESIGN ; TSV ; RELIABILITY ; VIAS |
WOS研究方向 | Science & Technology - Other Topics ; Materials Science ; Metallurgy & Metallurgical Engineering |
WOS类目 | Nanoscience & Nanotechnology ; Materials Science, Multidisciplinary ; Metallurgy & Metallurgical Engineering |
资助项目 | National Natural Science Foundation of China[51805543] ; Natural Science Foundation of Shandong Province of China[ZR2017BEE037] ; Fundamental Research and Application Funds of Qingdao City[16-5-1-47-jch] ; Fundamental Research Funds for the Central Universities[15CX02112A] ; Fundamental Research Funds for the Central Universities[18CX05002A] |
项目资助者 | National Natural Science Foundation of China ; Natural Science Foundation of Shandong Province of China ; Fundamental Research and Application Funds of Qingdao City ; Fundamental Research Funds for the Central Universities |
论文分区 | 一类 |
力学所作者排名 | 2 |
RpAuthor | Song, Ming |
引用统计 | |
文献类型 | 期刊论文 |
条目标识符 | http://dspace.imech.ac.cn/handle/311007/80699 |
专题 | 非线性力学国家重点实验室 |
推荐引用方式 GB/T 7714 | Song M,Wei ZQ,Wang BY,et al. Study on copper protrusion of through-silicon via in a 3-D integrated circuit[J]. MATERIALS SCIENCE AND ENGINEERING A-STRUCTURAL MATERIALS PROPERTIES MICROSTRUCTURE AND PROCESSING,2019,755:66-74. |
APA | Song M,Wei ZQ,Wang BY,Chen L,Chen L,&Szpunar JA.(2019).Study on copper protrusion of through-silicon via in a 3-D integrated circuit.MATERIALS SCIENCE AND ENGINEERING A-STRUCTURAL MATERIALS PROPERTIES MICROSTRUCTURE AND PROCESSING,755,66-74. |
MLA | Song M,et al."Study on copper protrusion of through-silicon via in a 3-D integrated circuit".MATERIALS SCIENCE AND ENGINEERING A-STRUCTURAL MATERIALS PROPERTIES MICROSTRUCTURE AND PROCESSING 755(2019):66-74. |
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